A 1.2V single supply and low power, CMOS four-quadrant analog multiplier

Author

Ebrahimi, Amir ; Naimi, Hossein Miar

Author_Institution

Integrated Circuits Res. Lab. (ICRL), Babol Univ. of Technol., Babol, Iran

fYear

2010

Firstpage

1

Lastpage

5

Abstract

In this paper, a new low voltage topology for analog multiplier is presented. The circuit can be used with single low-power supply. The complete circuit has only twelve transistors; therefore, it satisfies the need for compact sub-circuit in analog VLSI systems. The mathematical discussion on the power consumption, total harmonic distortion and other features of the circuit and also simulation results in 0.18μm CMOS technology are presented. The results show 113μW power consumption with 1.2V single supply, 1.1% total harmonic distortion (THD) and 1GHz band-width.

Keywords

CMOS analogue integrated circuits; analogue multipliers; low-power electronics; CMOS four quadrant analog multiplier; VLSI systems; bandwidth 1 GHz; compact subcircuit; low voltage topology; size 0.18 mum; voltage 1.2 V; CMOS integrated circuits; Equations; MOSFETs; Mathematical model; Power demand; Threshold voltage; analog multiplier; four-quadrant; low power; low voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), 2010 XIth International Workshop on

Conference_Location

Gammath

Print_ISBN

978-1-4244-6816-4

Type

conf

DOI

10.1109/SM2ACD.2010.5672334

Filename

5672334