DocumentCode
1733979
Title
Compact, low-voltage, low-power and high-bandwidth CMOS four-quadrant analog multiplier
Author
Ebrahimi, Amir ; Naimi, Hossein Miar ; Gholami, Mohammad
Author_Institution
Integrated Circuits Res. Lab. (ICRL), Babol Univ. of Technol., Babol, Iran
fYear
2010
Firstpage
1
Lastpage
5
Abstract
In this paper, a new compact, low power and low voltage structure for CMOS analog multiplier is proposed. All of them are implemented using a compact circuit. The circuit is designed and analyzed in 0.18μm CMOS process model. Simulation results for the circuit with a 1.2V single supply show that it consumes only 25μw quiescent power with 2GHz bandwidth and 1.5% THD.
Keywords
CMOS analogue integrated circuits; analogue multipliers; integrated circuit design; low-power electronics; semiconductor process modelling; CMOS four-quadrant analog multiplier; CMOS process model; bandwidth 2 GHz; circuit design; compact circuit; low power structure; low voltage structure; size 0.18 mum; voltage 1.2 V; CMOS integrated circuits; Circuit synthesis; Equations; Mathematical model; Power demand; Threshold voltage; Transistors; analog multiplier; four-qudrant; high-bandwidth low power; low voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), 2010 XIth International Workshop on
Conference_Location
Gammath
Print_ISBN
978-1-4244-6816-4
Type
conf
DOI
10.1109/SM2ACD.2010.5672341
Filename
5672341
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