Engineering Test Coverage on Complex Sockets

Sockets used for complex CPUs or System-on-a-chip (SOC) devices present extraordinary challenges for In-Circuit test. They usually have a large number of pins packed into a very small area. Additionally, a large percentage of the pins in the socket are power and ground pins that have limited or no discernible test coverage. Test industry solutions for these challenges have included functional test, inserted custom silicon test chips, and vector-less test. These solutions typically have one or more tradeoffs of time, complexity, cost, or coverage. This paper presents an extension to Network Parameter Measurement technology that allows vector-less test methodologies to overcome many of the challenges that sockets present.