• DocumentCode
    1734178
  • Title

    Solving In-Circuit Defect Coverage Holes with a Novel Boundary Scan Application

  • Author

    Dubberke, Dave ; Grealish, J.J. ; Van Dick, Bill

  • Author_Institution
    Intel Corp., Hillsboro, OR
  • fYear
    2008
  • Firstpage
    1
  • Lastpage
    9
  • Abstract
    Virtual test access, offered by boundary-scan at in-circuit test (ICT), is insufficient for the challenges of next generation´s high density printed circuit boards (PCBs). The loss of test access translates to loss of defect coverage. This paper describes a novel use of existing technologies that increases the effectiveness of boundary-scan.
  • Keywords
    boundary scan testing; printed circuit testing; boundary scan application; in-circuit defect coverage holes; in-circuit test; next generation high density printed circuit boards; Assembly; Circuit faults; Circuit testing; Design engineering; Design for testability; Graphics; Integrated circuit interconnections; Printed circuits; Routing; Tellurium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2008. ITC 2008. IEEE International
  • Conference_Location
    Santa Clara, CA
  • ISSN
    1089-3539
  • Print_ISBN
    978-1-4244-2402-3
  • Electronic_ISBN
    1089-3539
  • Type

    conf

  • DOI
    10.1109/TEST.2008.4700579
  • Filename
    4700579
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1734178