DocumentCode
1734355
Title
Low Power Scan Shift and Capture in the EDT Environment
Author
Czysz, D. ; Kassab, M. ; Lin, X. ; Mrugalski, G. ; Rajski, J. ; Tyszer, J.
Author_Institution
Poznan Univ. of Technol., Poznan
fYear
2008
Firstpage
1
Lastpage
10
Abstract
This paper presents a new and comprehensive power-aware test scheme compatible with a test compression environment. The key contribution of the paper is a flexible test application framework that achieves significant reductions in switching activity during all phases of scan test: scan loading, unloading, and capture.
Keywords
design for testability; electronic equipment testing; low-power electronics; network synthesis; EDT environment; flexible test application framework; low power scan shift; power-aware test; scan loading; scan test; scan unloading; test compression environment; Built-in self-test; Circuit testing; Energy consumption; Energy management; Flip-flops; Graphics; Logic testing; Power dissipation; Switching circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700585
Filename
4700585
Link To Document