Synthesis and optimization of analog VLSI filters from VHDL-AMS parse trees

This contribution presents a new technique for the synthesis and optimization of VLSI bandpass filter in the Gigahertz frequency range. We present synthesis examples of silicon LC filters and fourth-order RC filters using positive feedback bootstrapping circuits. The filter characteristics are defined using a high-level behavioral description in VHDL-AMS. The architectural synthesis is done by the identification of synthesizable constructs from a VHDL-AMS parse tree. The netlists produced by the architectural synthesizer are subsequently subjected to parametric optimization, using HSPICE simulations in the optimization loop, for improved performance.