An interval arithmetic-based yield evaluation in circuit tolerance design

Author

Spagnuolo, G.

Author_Institution

Dipt. di Ingegneria dell´´Informazione ed Ingegneria Elettrica, Salerno Univ., Italy

Volume

1

fYear

2002

fDate

6/24/1905 12:00:00 AM

Abstract

In this paper a new approach to the yield evaluation of electronic circuits is presented. It is a divide-and-conquer algorithm based on interval arithmetic that allows one to reliably mark as feasible or unfeasible those hyper-rectangles that are completely in or out of the region of acceptability. In addition, it identifies any portion of the boundaries of the region of acceptability that is included in the tolerance region and refines the analysis across it. The proposed technique guarantees an efficient, reliable and accurate evaluation of the yield, even in presence of a non-convex and non-simply connected region of acceptability. Thanks to its capacity to quickly detect the boundary of the region of acceptability, it is proposed as a useful tool for tolerance design. The example presented shows the features of the approach.

Keywords

arithmetic; divide and conquer methods; electronic engineering computing; integrated circuit design; integrated circuit yield; tolerance analysis; circuit tolerance design; divide-and-conquer algorithm; electronic circuits; hyper-rectangles; interval arithmetic-based yield evaluation; manufacturing yield; region of acceptability; tolerance region; Arithmetic; Costs; Electronic circuits; Flexible manufacturing systems; Flexible printed circuits; Manufacturing processes; Productivity; Software design; Software tools; Time to market;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1009950

Filename

1009950