DocumentCode
1734609
Title
Design and characterization of power delivery system for multi-chip package with embedded discrete capacitors
Author
Cheng, Hung-Hsiang ; Kuo, Chih-Wen ; Pan, Po-Chih ; Chen, Yi-Hua ; Chen, Kuo-Hua ; Li, Li ; Han, Ken ; Cooper, Glenn
Author_Institution
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
fYear
2011
Firstpage
2179
Lastpage
2184
Abstract
An innovative embedded passive solution which directly embeds surface mount discrete (SMD) capacitor in the package substrate is presented. Comparing with embedded planar capacitor, the embedded discrete capacitor technology provides more design feasibilities for decoupling purpose. The capacitors can be placed underneath the chip to reduce the loop inductance. In this paper, characterization of embedded discrete capacitors in multi-chip package (MCP) is presented. The chip, package and print circuit board (PCB) co-simulation to well design the embedded discrete substrate is demonstrated. Power delivery system (PDS) performance is studied in both the frequency and time domains. The peak to peak noise in PDS has been reduced substantially through design and characterization methodology proposed.
Keywords
capacitors; frequency-domain analysis; multichip modules; printed circuits; surface mount technology; time-domain analysis; MCP; PCB; PDS; SMD capacitor; embedded discrete capacitor; embedded planar capacitor; frequency domain analysis; loop inductance; multichip package; peak to peak noise; power delivery system; print circuit board; surface mount discrete capacitor; time domain analysis; Capacitance; Capacitors; Impedance; Inductance; Integrated circuit modeling; Noise; US Department of Energy;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location
Lake Buena Vista, FL
ISSN
0569-5503
Print_ISBN
978-1-61284-497-8
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2011.5898821
Filename
5898821
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