Title :
Fast soft-output Viterbi decoding for duo-binary turbo codes
Author :
Saouter, Yannick ; Berrou, Claude
Author_Institution :
Ecole Nat. Superieure des Telecommun. de Bretagne, Brest, France
fDate :
6/24/1905 12:00:00 AM
Abstract :
The implementation of a soft-output Viterbi decoder for an eight-state duo-binary code is described. This decoder is to be used in a turbo-decoder for convolutional codes. The implementation was made with the SYNOPSYS environment and targeted an ASIC 0.18 μm technology. The layout obtained has a working frequency of 150 MHz and thus an output data rate of 300 Mbits/s.
Keywords :
Viterbi decoding; application specific integrated circuits; binary codes; convolutional codes; digital video broadcasting; electronic design automation; error correction codes; hardware description languages; integrated circuit layout; interactive television; iterative decoding; turbo codes; video coding; 0.18 micron; 150 MHz; 300 Mbit/s; ASIC; DVB; ETSI; SOVA; SYNOPSYS environment; VHDL; Viterbi decoding; convolutional codes; digital video broadcasting; duo-binary codes; error-correcting code; interactive TV; iterative decoding; soft-output Viterbi algorithm; turbo codes; Artificial satellites; Binary codes; Circuits; Convolutional codes; Digital video broadcasting; Iterative decoding; Satellite broadcasting; Telecommunication standards; Turbo codes; Viterbi algorithm;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1009983
