A design for test proposal for improving dynamic current testing reliability on regenerative sense amplifiers

Author

Arguelles, J. ; Bracho, S.

Author_Institution

TEISA Dept., Cantabria Univ., Santander, Spain

fYear

1997

Firstpage

29

Lastpage

32

Abstract

A design for test method for improving dynamic supply current testing reliability on regenerative sense amplifier structures is described in this paper. This proposal uses a built-in current monitor to represent the supply current through the regenerative sense amplifier by a digital signature, externally analyzed by a digital tester. A fully differential fast comparator circuit has been used as a demonstrator to explore the effectiveness of the proposal. Different catastrophic faults at transistor level were considered and simulation results are discussed.

Keywords

design for testability; DFT method; built-in current monitor; catastrophic faults; design for test method; digital signature; digital tester; dynamic current testing reliability; fully differential fast comparator circuit; regenerative sense amplifiers; transistor level faults; Circuit faults; Circuit simulation; Circuit testing; Coupling circuits; Current supplies; Electrical fault detection; Fault detection; Monitoring; Performance evaluation; Proposals;

fLanguage

English

Publisher

ieee

Conference_Titel

IDDQ Testing, 1997. Digest of Papers., IEEE International Workshop on

Conference_Location

Washington, DC, USA

Print_ISBN

0-8186-8123-3

Type

conf

DOI

10.1109/IDDQ.1997.633009

Filename

633009