DocumentCode
1735832
Title
Test Generation for Interconnect Opens
Author
Lin, Xijiang ; Rajski, J.
Author_Institution
Mentor Graphics Corp., Wilsonville, OR
fYear
2008
Firstpage
1
Lastpage
7
Abstract
Interconnect opens are one of major failure mechanisms in contemporary deep sub-micro designs. In this paper, we present three test generation methods, static dominant, dynamic dominant, and double observation, to generate the tests for the interconnect opens. The first two methods take the electrical behavior of the interconnect opens into consideration during test generation and the third method is applied when the parasitic capacitances between the open net and its neighboring nets are not dominant parameter to determine the voltage at the open net. The experimental results show that N-detection stuck-at test set and transition test set are not sufficient to achieve high test coverage on detecting interconnect opens, especially when the voltage at the interconnect open is determined by a large number of neighboring nets. The top-up test patterns generated by using proposed test generation methods help to improve the test quality on detecting interconnect open defects.
Keywords
automatic test pattern generation; failure analysis; fault diagnosis; integrated circuit interconnections; N-detection stuck-at test set; deep sub-microdesigns; dominant parameter; double observation; dynamic dominant; failure mechanisms; interconnect open defects; parasitic capacitances; static dominant; test pattern generation; transition test set; Circuit faults; Circuit testing; Failure analysis; Fault detection; Integrated circuit interconnections; Logic testing; Parasitic capacitance; Test pattern generators; Transistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700640
Filename
4700640
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