CMOS circuit design and implementation of the discrete time chaotic chip

Author

Song, Han Jung ; Kwack, Kae Dal

Author_Institution

Dept. of Electron. Eng., Chung Cheong Coll., Chung-Buk, South Korea

Volume

3

fYear

2002

fDate

6/24/1905 12:00:00 AM

Abstract

A discrete time chaotic signal generator has been designed and fabricated in a 0.8 μm single poly CMOS technology. The proposed chaotic circuit consists of sample-holds, opamps, a nonlinear function block and a two-phase clock generator. This paper examines numerical analysis for it´s chaotic behavior including bifurcation, Lyapunov exponent and frequency spectra. Measurement of the fabricated chaotic chip is performed with a ±2.5 V power supply and clock frequency of 10 kHz. We confirmed that a discrete time chaotic signal is generated in specific input condition. Also, we obtained diverse chaotic behavior as expected from the numerical analysis.

Keywords

CMOS analogue integrated circuits; Lyapunov methods; bifurcation; chaos generators; discrete time systems; sample and hold circuits; 0.8 micron; 10 kHz; 2.5 V; CMOS; Lyapunov exponent; bifurcation; chaotic signal generator; clock frequency; discrete time chaotic chip; discrete time chaotic signal; diverse chaotic behavior; frequency spectra; nonlinear function block; opamps; sample-holds; two-phase clock generator; Bifurcation; CMOS technology; Chaos; Circuit synthesis; Clocks; Frequency; Numerical analysis; Power measurement; Signal design; Signal generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010163

Filename

1010163