Title :
Some Burning Issues that Justify Power-Aware DFT
Author_Institution :
Adv. Micro Devices, Sunnyvale, CA
Abstract :
There is no question that awareness of power dissipation during testing is essential. In fact, there are many levels of awareness with respect to power: Measuring power during functional test; Managing power during structural test; Testing the power management features; Testing despite the power management features The first two fall into the category of managing the high- power aspects of testing; the next two are pertinent to the need to test the low-power aspects of a design. All of these dimensions have an impact on power-aware DFT.
Keywords :
automatic test pattern generation; design for testability; integrated circuit testing; functional testing; power dissipation; power management features; power-aware DFT; structural test; Automatic test pattern generation; Automatic testing; Circuit testing; Clocks; Design for testability; Energy management; Hardware; Logic testing; Power dissipation; Power measurement;
Conference_Titel :
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-2402-3
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2008.4700661
