Debug War Stories

Anyone that has been involved in semiconductor test has their own debug war that they have survived. It use to be that debugging customer failures would involve exchanges of code sections with the customer, timely set up of functional test patterns for containment in production and exercising the fault for failure analysis. With high fault coverage scan methodology a large part of the effort can now be achieved very efficiently using the scan-based test logic. Our approach was to utilize the customer´s functional code on a tester and make use of the scan structures of the design. For this device all clocking was supplied by the tester and the scan mode entry is via static combinational logic.