DocumentCode
1736684
Title
The University DFT Tool Showdown - Introduction
Author
Davidson, Scott
Author_Institution
Sun Microsyst., Sunnyvale, CA
fYear
2008
Firstpage
1
Lastpage
1
Abstract
Developing new test algorithms or techniques requires examples on which to try the methods out. Test cases will help to reveal flaws and weaknesses in an algorithm, and may also indicate the need for new test methods. This panel is a challenge to academics to show their work applied to a large modern design. After an introduction to OpenSparc, panelists will present test work as applied to either all or part of the processor, and at various design levels.
Keywords
design for testability; educational institutions; electronic engineering education; integrated circuit design; integrated circuit testing; microprocessor chips; OpenSparc initiative; University DFT tool; circuit design techniques; design for testability; industrial research; microprocessors; test methods; Algorithm design and analysis; Automatic test pattern generation; Benchmark testing; Circuit testing; Circuits and systems; Design for testability; Integrated circuit testing; Logic testing; Sun; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location
Santa Clara, CA
ISSN
1089-3539
Print_ISBN
978-1-4244-2402-3
Electronic_ISBN
1089-3539
Type
conf
DOI
10.1109/TEST.2008.4700674
Filename
4700674
Link To Document