Jitter reduction in ATM networks

Waiting time jitter is one of the main problems encountered in ATM (asynchronous transfer mode) networks, as its amplitude (after filtering) can exceed that permitted by current standards. A method for reducing jitter is presented which consists in transmitting the phase information from the plesiochronous source measured by a reference clock. This information is protected against transmission errors and cell loss. It is shown that it is possible to conform to CCITT recommendation G.823 for all plesiochronous rates of the 2-Mb/s hierarchy defined in recommendation G.702 by using as the reference clock either the 2-MHz synchronization network or the future 155-MHz network provided by the synchronous systems (synchronous digital hierarchy)