Title :
Platform Independent Test Access Port Architecture
Author :
Margulis, Arie ; Akselrod, Dimitry ; Wood, Tim ; Metsis, Sophocles
Author_Institution :
AMD, Markham, ON
Abstract :
In this work, we present and analyze a generic test access port (TAP) architecture capable of being re-used without any modifications in various system-on-chip (SoC) ICs as well as a "modular Jtag" multi-TAP architecture that allows embedded IPs to control their boundary-scan segments and be IEEE 1149.1 compliant.
Keywords :
integrated circuit testing; system-on-chip; IEEE 1149.1 compliant; embedded IP; modular Jtag multi TAP architecture; platform independent test access port architecture; system-on-chip IC; Circuit testing; Computer architecture; Control systems; Integrated circuit interconnections; Integrated circuit testing; Joining processes; Logic; Registers; System testing; System-on-a-chip;
Conference_Titel :
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-2402-3
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2008.4700687
