Design of HDLC controller based on Xilinx FPGA

In order to guarantee radio communication in the Xilinx FPGA software radio project, a new HDLC controller is designed. The details of the design of some functional modules and FSMs are described in this paper. For using HDLC protocol easily, a method of implementing HDLC protocol by Verilog HDL and the process of conducting CRC are also described. The HDLC controller can send and receive the multi-channel HDLC protocol frame in parallel way. The system is tested by down-loading into FPGA. Experimental results show that the method of implementing HDLC protocol by Verilog HDL is feasible.