Title :
A Low-Cost Programmable Memory BIST Design for Multiple Memory Instances
Author :
Lin, Chung-Fu ; Huang, Chia-Fu ; Lu, De-Chung ; Hsu, Chih-Chiang ; Chiu, Wen-Tsung ; Chen, Yu-Wei ; Chang, Yeong-Jar
Author_Institution :
Faraday Technol. Corp., Hsinchu
Abstract :
In this work, we propose a hardware-sharing P-MBIST design to test multiple memory instances with different types in one BIST design. By sharing a common address generator and controller, the area overhead is significantly reduced in comparison to existing works. A high-speed address generator with column-scan feature is also proposed for at-speed/full-speed tests. The proposed P-MBIST design can be automatically generated according to a user-defined configuration file. A priority-based verification process for the soft IP is also presented in this work.
Keywords :
built-in self test; integrated circuit design; integrated circuit testing; integrated memory circuits; logic design; logic testing; programmable circuits; system-on-chip; column-scan feature; hardware-sharing P-MBIST design; high-speed address generator; low-cost programmable memory BIST; multiple memory instances; system-on-chip designs;
Conference_Titel :
Test Conference, 2008. ITC 2008. IEEE International
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-2402-3
Electronic_ISBN :
1089-3539
DOI :
10.1109/TEST.2008.4700691
