DocumentCode
1739182
Title
A direct digitally delay generator
Author
Calbaza, Dorin Emil ; Savaria, Yvon
Author_Institution
Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada
Volume
1
fYear
2000
fDate
2000
Firstpage
87
Abstract
The development of communication systems in the past years has increased the necessity to synthesize very accurate clocks, having large frequencies and very low jitter. In the same large numbers expresses the divide ratios between the frequencies of the clocks that we have to synchronize. This paper presents a new type of circuit named Direct Digitally Delay Generator (DDDG), able to synthesize frequencies up to 1 GHz with a jitter below 200 ps
Keywords
clocks; delay circuits; direct digital synthesis; synchronisation; timing jitter; 1 GHz; 200 ps; clock synthesis; communication system; direct digital synthesis; direct digitally delay generator; divide ratio; jitter; synchronization; CMOS technology; Circuit synthesis; Clocks; Delay; Filters; Frequency synchronization; Frequency synthesizers; HDTV; Jitter; Signal resolution;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Conference, 2000. CAS 2000 Proceedings. International
Conference_Location
Sinaia
Print_ISBN
0-7803-5885-6
Type
conf
DOI
10.1109/SMICND.2000.890193
Filename
890193
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