SRAM NBTI mitigation with predictable activity based dynamic stress-recovery timing

Negative Bias Temperature Instability (NBTI) is one of the major reliability issues for nano-scale semi-conductor devices. With the continuous device scaling, NBTI effect is becoming more and more severe for lower technology node, causing life-time degradation. Several solutions have been proposed to develop device life-time by interrupting interface trap generation in Si-SiO₂ interface. Implementing periodic stress and relaxation mode by applying periodic data flipping of the SRAM memory cells is one of the most effective ways of NBTI effect mitigation. Life-time degradation of a device depends on the ratio of stress and recovery timing for a certain time period. In this paper, a dynamic stress-recovery timing pattern for periodic flipping based on SRAM activity has been proposed and concluded that with the proposed stress-recovery timing pattern, NBTI degradation in each PMOS device of the SRAM array has further been mitigated.