DocumentCode :
1739994
Title :
BISTing data paths at behavioral level
Author :
Berthelot, David ; Flottes, Marie-Lise ; Ronzeyre, B.
Author_Institution :
LIRMM, Montpellier, France
fYear :
2000
fDate :
2000
Firstpage :
672
Lastpage :
680
Abstract :
This paper presents a method for deriving a BIST specification directly from the initial specification of datapath architectures. It minimizes BIST area overhead while guaranteeing user chosen fault coverage. The results show great improvements over lower level techniques
Keywords :
built-in self test; circuit CAD; circuit optimisation; design for testability; high level synthesis; integrated circuit design; integrated circuit testing; logic testing; BIST area overhead minimisation; BIST specification; CAD; behavioral level; data path initial specification; datapath architectures; user chosen fault coverage; Arithmetic; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Compaction; Costs; High level synthesis; Logic testing; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2000. Proceedings. International
Conference_Location :
Atlantic City, NJ
ISSN :
1089-3539
Print_ISBN :
0-7803-6546-1
Type :
conf
DOI :
10.1109/TEST.2000.894262
Filename :
894262
Link To Document :
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