Simulation and optimization of FILOX vertical MOSFET for subthreshold leakage reduction

Subthreshold leakage current is becoming a significantly large component of total power dissipation for the state of the art CMOS technology nodes. As a result, devices need to be optimized for high performance and low power circuit operation. In this work we simulated an already fabricated FILOX vertical MOSFET reported by Hakim, et al [8]. Later this v-MOSFET was optimized using a low energy high-to-low step surface doping to raise MOSFET´s threshold voltage. The use of this high threshold voltage v-MOSFET with a forward body bias applied during active mode in leakage current saving was examined. It was found that leakage current saving increases almost linearly with the increase in forward body bias. But as the forward body bias increases beyond 0.5v, a severe degradation of subthreshold slope was observed.