• DocumentCode
    1742461
  • Title

    Board-level solder joint reliability comparison of five unique memory package constructions

  • Author

    Newman, Keith ; Freda, Michael ; Ito, Hidenori ; Yama, Naoki ; Nakanishi, Eriko

  • Author_Institution
    Sun MicroSyst. Inc., Menlo Park, CA, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    27
  • Lastpage
    43
  • Abstract
    Sun Microsystems, Inc., investigated the board-level solder joint reliability of five unique package constructions of a 54/62 lead memory package. Following a process optimization study, the 0.8/1.0 mm grid chip scale package (CSP) devices were assembled on a complex test board by an advanced board assembly subcontractor, Suzuka Fuji Xerox. In addition to the numerous CSP devices, the test board also included a variety of flip-chip and wirebond BGA packages, and a ceramic column grid array package; only test results of the CSP devices are reported in this paper. Circuit board solder ball land pad (via-in-pad) diameters of 300 μm and 350 μm for the 54/62 lead CSP devices were evaluated. Testing also included a comparison between packages reflowed on to the circuit board using a conventional mass reflow furnace, and those using a production rework machine. The circuit board assemblies were temperature cycled between 0°C and 100°C, and electrically monitored for opens. Summary tables and figures comparing the reliability characteristics of the various chip-scale package constructions were generated
  • Keywords
    assembling; chip scale packaging; circuit reliability; integrated memory circuits; printed circuit manufacture; printed circuit testing; process monitoring; reflow soldering; thermal stresses; 0 to 100 C; 0.8 mm; 1 mm; 300 micron; 350 micron; CSP devices; board assembly subcontractor; board-level solder joint reliability; ceramic column grid array package; chip scale package; chip-scale package constructions; circuit board assemblies; circuit board solder ball land pad diameter; electrical monitoring; flip-chip BGA packages; mass reflow furnace; memory package; package construction; package reflow; production rework machine; reliability characteristics; temperature cycling; test board; via-in-pad diameter; wirebond BGA packages; Assembly; Ceramics; Chip scale packaging; Circuit testing; Lead; Packaging machines; Printed circuits; Soldering; Subcontracting; Sun;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Materials and Packaging, 2000. (EMAP 2000). International Symposium on
  • Conference_Location
    Hong Kong
  • Print_ISBN
    0-7803-6654-9
  • Type

    conf

  • DOI
    10.1109/EMAP.2000.904130
  • Filename
    904130