• DocumentCode
    1742501
  • Title

    Thermal/mechanical analysis of novel C-TSOP using nonlinear FEM method

  • Author

    Lin, Ji-Cheng ; Chiang, Kuo-Ning

  • Author_Institution
    Dept. of Power Mech. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    371
  • Lastpage
    377
  • Abstract
    This paper describes a novel ceramic thin-small-outline package (C-TSOP) to meet the thermal performance and long-term reliability considerations of low-pin-count and high-performance electronic devices, especially for memory devices. To improve the disadvantages of molding compounds and simplify the fabrication process, the molding compound is replaced by a ceramic-like stiffener which is adhered to the leadframe by tape or adhesive. The ceramic-like stiffener would overcome the low thermal conductivity problem of molding compound in a conventional lead-on-chip TSOP (LOC-TSOP) and increase the thermal dissipation efficiency. In this paper, 3D nonlinear finite element models of both the conventional and novel LOC-TSOPs have been established. Various heat generation scenarios are applied to the 3D nonlinear models under natural convection conditions for evaluation of heat dissipation capability and thermal resistance of the packages. Moreover, the material properties and solder joint reliability of the packages are also investigated. In order to compare solder joint reliabilities of the novel and conventional LOC-TSOPs, a nonlinear finite element method is used to analyze the physical behaviors of packages under thermal loading conditions. The thermal fatigue life of the solder joints has been estimated in terms of equivalent plastic strain. The results are compared to the experiments in the literature in order to verify the accuracy of the finite element models. From the results, it can be concluded that the novel C-TSOP package implies excellent thermal performance and solder joint reliability
  • Keywords
    adhesives; ceramic packaging; cooling; finite element analysis; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; integrated memory circuits; natural convection; plastic deformation; soldering; thermal conductivity; thermal management (packaging); thermal resistance; thermal stress cracking; 3D nonlinear finite element models; C-TSOP; C-TSOP package; LOC-TSOP; ceramic thin-small-outline package; ceramic-like stiffener; device pin-count; electronic devices; equivalent plastic strain; fabrication process; finite element models; heat generation scenarios; lead-on-chip TSOP; leadframe adhesion; long-term reliability; material properties; mechanical analysis; memory devices; molding compounds; natural convection; nonlinear FEM method; package heat dissipation capability; package thermal resistance; solder joint reliability; solder joints; thermal analysis; thermal conductivity; thermal dissipation efficiency; thermal fatigue life; thermal loading; thermal performance; Ceramics; Electronic packaging thermal management; Fabrication; Finite element methods; Lead; Material properties; Materials reliability; Soldering; Thermal conductivity; Thermal resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Materials and Packaging, 2000. (EMAP 2000). International Symposium on
  • Conference_Location
    Hong Kong
  • Print_ISBN
    0-7803-6654-9
  • Type

    conf

  • DOI
    10.1109/EMAP.2000.904182
  • Filename
    904182