DocumentCode
1743370
Title
An FPGA-based low-cost frame grabber for image processing applications
Author
Xu, Donglai ; Boussakta, Said ; Bentley, John P.
Author_Institution
Sch. of Sci. & Technol, Univ. of Teeside, Middlesbrough, UK
Volume
1
fYear
2000
fDate
2000
Firstpage
333
Abstract
This paper presents a low-cost frame grabber, which was specifically designed as part of a real-time motion detection system for high-resolution images. The frame grabber is FPGA-based to minimise size of the PCB and improve reliability of the system. It also acts as a backend add-on card for an IBM-PC compatible. The experimental tests carried out on different machines show that the board implemented meets all specifications required by the system, and performs well. The captured frames are clear, well contrasted and jitter-free in both live and still video modes and their quality is comparable to that available from equivalent commercial systems
Keywords
analogue-digital conversion; field programmable gate arrays; image processing equipment; motion estimation; real-time systems; FPGA-based low-cost frame grabber; backend add-on card; image processing applications; jitter-free frames; real-time motion detection system; reliability; still video modes; Control systems; Displays; Field programmable gate arrays; Hardware; Image processing; Image resolution; Motion detection; Phase locked loops; Programmable logic arrays; Real time systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
Conference_Location
Jounieh
Print_ISBN
0-7803-6542-9
Type
conf
DOI
10.1109/ICECS.2000.911549
Filename
911549
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