Title :
Switched-current bilinear ladder group-delay equalisers
Author :
Ng, Andrew E J ; Sewell, J.I.
Author_Institution :
Dept. of Electron. & Electr. Eng., Glasgow Univ., UK
Abstract :
A matrix-based synthesis of bilinear switched-current (SI) ladder derived group-delay equalisers is described. Previous SI equalisers have been realised with Euler-type integrators in both ladder and cascade biquad forms. These are compared for sensitivity and effects of nonideal integrator factors such as finite conductance ratios, charge-injection and settling errors
Keywords :
equalisers; integrating circuits; ladder networks; sensitivity analysis; switched current circuits; Euler-type integrators; cascade biquad form; charge-injection; finite conductance ratios; group-delay equalisers; matrix-based synthesis; nonideal integrator factors; sensitivity; settling errors; switched-current bilinear ladder; Admittance; Capacitors; Discrete transforms; Equalizers; Equations; Filters; Impedance; Inductors; Prototypes; Virtual prototyping;
Conference_Titel :
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
Conference_Location :
Jounieh
Print_ISBN :
0-7803-6542-9
DOI :
10.1109/ICECS.2000.912968
