DocumentCode
1744274
Title
Sequence reordering to improve the levels of compaction achievable by static compaction procedures
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear
2001
fDate
2001
Firstpage
214
Lastpage
218
Abstract
We describe a reordering procedure that changes the order of test vectors in a test sequence for a synchronous sequential circuit without reducing the fault coverage. We use this procedure to investigate the effects of reordering on the ability to compact the test sequence. Reordering is shown to have two effects on compaction. (1) The reordering process itself allows us to reduce the test sequence length. (2) Reordering can improve the effectiveness of an existing static compaction procedure. Reordering also provides an insight into the detection by test generation procedures of faults that are detected by relatively long subsequences
Keywords
fault diagnosis; logic partitioning; logic testing; sequential circuits; reordering process; sequence partitioning; sequence reordering; static compaction; synchronous sequential circuit; test vectors; Circuit faults; Circuit testing; Cities and towns; Compaction; Fault detection; Sequential analysis; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location
Munich
ISSN
1530-1591
Print_ISBN
0-7695-0993-2
Type
conf
DOI
10.1109/DATE.2001.915027
Filename
915027
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