DocumentCode
1744276
Title
Efficient on-line testing method for a floating-point adder
Author
Drozd, A. ; Lobachev, M.
Author_Institution
Dept. of Comput. Syst., Odessa State Polytech. Univ., Ukraine
fYear
2001
fDate
2001
Firstpage
307
Lastpage
311
Abstract
In this paper we present a residue method for on-line testing of the floating-point adder. This circuit contains arithmetic shifter which executes an abridged operation. In the method the problem of the abridged operation checking with the reduced hardware amount is solved
Keywords
adders; automatic testing; floating point arithmetic; logic testing; residue number systems; abridged operation; arithmetic shifter; floating-point adder; on-line testing method; reduced hardware; residue method; Adders; Circuit testing; Digital arithmetic; Floating-point arithmetic; Hardware; Multiplexing; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location
Munich
ISSN
1530-1591
Print_ISBN
0-7695-0993-2
Type
conf
DOI
10.1109/DATE.2001.915042
Filename
915042
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