Title :
Towards a better understanding of failure modes and test requirements of ADCs
Author :
Lechner, A. ; Richardson, A. ; Hermes, B.
Author_Institution :
Fac. of Appl. Sci., Lancaster Univ., UK
Abstract :
It is now widely recognised that Built-in Self-Test (BIST) techniques and Design-for-Testability (DfT) will be mandatory to meet test and quality specifications in next generation mixed signal ICs. For evaluating, verifying, and comparing testability improvements, a more detailed understanding of circuit specific failure modes is essential. This paper presents fault simulation results for a 6-bit ADC and identifies typical failure modes the converter is likely to exhibit and hence must be tested for
Keywords :
analogue-digital conversion; built-in self test; circuit simulation; design for testability; fault simulation; mixed analogue-digital integrated circuits; 6 bit; ADCs; BIST; DfT; circuit specific failure modes; fault simulation results; next generation mixed signal ICs; quality specifications; Automatic testing; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Fault diagnosis; Resistors; Semiconductor device testing; Silicon; Voltage;
Conference_Titel :
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location :
Munich
Print_ISBN :
0-7695-0993-2
DOI :
10.1109/DATE.2001.915129
