Using mission logic for embedded testing

Testing logic cores of a system-on-a-chip causes a high test data volume which has to be stored on the external automatic test equipment (ATE), a high bandwidth requirement between ATE and the chip under test implying the need for high-speed ATE. This paper reduces these requirements by reusing embedded cores during test mode as embedded testers, Hard, firm, and soft cores may be reused, since only the functionality of the core in system mode is used