On automatic analysis of geometrically proximate nets in VLSI layout

Author

Koranne, Sandeep ; Gangwai, O.P.

Author_Institution

Philips Res. Lab., Eindhoven, Netherlands

fYear

2001

fDate

2001

Firstpage

818

Abstract

We address the problem of automatic analysis of geometrically proximate nets in VLSI layout by presenting a framework (named FASCL) which supports pairwise analysis of nets based on a geometric kernel. The exact form of the analysis function can be specified to the kernel, which assumes a coupling function based on pairwise interaction between geometrically proximate nets. The user can also attach these functions to conditions and FASCL will automatically apply the function to all pairs of nets which satisfy a condition. Our method runs with sub-quadratic time complexity, O(N^1+k), where N is the number of nets and we have proved that k<1. We have successfully used the program to analyze circuits for bridging faults, coupling capacitance extraction, crosstalk analysis, signal integrity analysis and delay fault testing

Keywords

VLSI; automatic test software; crosstalk; delays; fault diagnosis; integrated circuit layout; integrated circuit testing; FASCL; VLSI layout; automatic analysis; bridging faults; coupling capacitance extraction; coupling function; crosstalk analysis; delay fault testing; geometric kernel; geometrically proximate nets; pairwise analysis; pairwise interaction; signal integrity analysis; sub-quadratic time complexity; Capacitance; Circuit analysis; Circuit faults; Circuit testing; Coupling circuits; Crosstalk; Delay; Kernel; Signal analysis; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings

Conference_Location

Munich

ISSN

1530-1591

Print_ISBN

0-7695-0993-2

Type

conf

DOI

10.1109/DATE.2001.915166

Filename

915166