Partially depleted silicon-on-insulator (SOI): a device design/modeling and circuit perspective

Author

Assaderaghi, F. ; Shahidi, G. ; Fung, S. ; Sherony, M. ; Wagner, L. ; Sleight, J. ; Lo, S.H. ; Wu, K. ; Chen, T.C.

Author_Institution

Semicond. Res. & Dev. Center, IBM Corp., Hopewell Junction, NY, USA

fYear

2000

fDate

2000

Firstpage

201

Lastpage

204

Abstract

This paper reviews the evolution of partially depleted (PD) CMOS SOI technology at IBM. Several aspects of this development leading to successful fabrication of high-performance microprocessors are discussed. They include SOI-specific device design and process modifications; creation of compact device models for circuit simulation (SPICE-like models); and development of circuit styles and strategies employed in the design of CMOS VLSI on PD SOI. Since these strategies address issues and problems that arise on PD SOI circuits such as delay hysteresis and noise margin reduction, they are discussed in detail. Although many aspects of CMOS design pertaining to SOI are covered, emphasis is placed on dynamic and static circuits and high-performance SRAMs

Keywords

CMOS integrated circuits; SPICE; SRAM chips; VLSI; circuit simulation; delays; hysteresis; integrated circuit modelling; integrated circuit noise; microprocessor chips; semiconductor device models; silicon-on-insulator; CMOS VLSI design; CMOS design; PD CMOS SOI technology; PD SOI circuits; SOI-specific device design modifications; SOI-specific process modifications; SPICE-like models; SRAMs; Si-SiO₂; circuit perspective; circuit simulation; circuit strategies; circuit styles; compact device models; delay hysteresis; device design; device modeling; dynamic circuits; microprocessors; noise margin reduction; partially depleted CMOS SOI technology; partially depleted SOI; partially depleted silicon-on-insulator; static circuits; CMOS process; CMOS technology; Circuit simulation; Delay; Fabrication; Microprocessors; Process design; Semiconductor device modeling; Silicon on insulator technology; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics, 2000. ICM 2000. Proceedings of the 12th International Conference on

Conference_Location

Tehran

Print_ISBN

964-360-057-2

Type

conf

DOI

10.1109/ICM.2000.916444

Filename

916444