DocumentCode
1744847
Title
Digital halftoning with optimized dither array
Author
Abe, Yoshito
Author_Institution
Manuf. Technol. Integration Lab., Dai Nippon Printing Co. Ltd., Tokyo, Japan
Volume
2
fYear
2001
fDate
6-9 May 2001
Firstpage
517
Abstract
The paper presents the new design method of the ordered dither array based on a simulated annealing. The obtained ordered dither array is appropriate for press printing. Because of several physical reasons, halftoning for press printing has more difficulties than halftoning for electronic displays, laser printers, or ink-jet printers. Even if the error diffusion is one of the best solutions for halftoning, that is not appropriate for press printing. Because too much dot-gain and dot-loss exist, the tonal characteristics of actual printed images will change excessively from the logical tone of digital halftone images. This is one of the main reasons why dispersed-dot stochastic screens are seldom used for press printing. The proposed halftone dither array has aperiodic clustered-dot pattern. The array is designed with simulated annealing. The cluster size can be controlled by the weighting parameter of the cost function. We will get a dither array with arbitrarily sized cluster-dot. The characteristics of the algorithm and the halftoned images are investigated in detail. As a result, the facts that the proposed halftone masks are superior to the conventional screens in visual quality, and are comparable to the conventional AM screens in press printability are confirmed
Keywords
image resolution; pattern clustering; printing; simulated annealing; stochastic processes; aperiodic clustered-dot pattern; cluster size; digital halftoning; dispersed-dot stochastic screens; optimized dither array; press printing; simulated annealing; tonal characteristics; visual quality; weighting parameter; Cost function; Design methodology; Displays; Ink jet printing; Laser theory; Printers; Simulated annealing; Size control; Stochastic processes; Weight control;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921121
Filename
921121
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