Title :
Accelerating volume rendering using an on-chip SRAM occupancy map
Author :
Meissner, Markus ; Doggett, M. ; Kamus, U. ; Hirche, J.
Author_Institution :
Wilhelm-Schickard-Inst. fur Inf., Tubingen Univ., Germany
Abstract :
One of the most severe problems for ray casting architectures is the waste of computation cycles and I/O bandwidth, due to redundant sampling of empty space. While several techniques exist for software implementations to skip these empty regions, few are suitable for hardware implementation. The few which have been presented either require a tremendous amount of logic or are not feasible for high frequency designs (i.e. running at 100 MHz) where latency is the one of the biggest issues. In this paper, we present an efficient space leaping approach which requires only a small amount of SRAM (4 Kbit for a 256 3 volume) and can be easily integrated into ray casting architectures. For each subcube of the volume, a bit is stored in an occupancy map, indicating whether the subcube is empty or not. Using a set of real-world datasets, we show that frame-rates well above 15 frames per second can be accomplished for the VIZARD II volume rendering architecture
Keywords :
computer graphic equipment; microprocessor chips; pipeline processing; random-access storage; rendering (computer graphics); 100 MHz; VIZARD II volume rendering architecture; frame-rates; on-chip SRAM occupancy map; ray casting architectures; space leaping approach; volume rendering acceleration; Acceleration; Bandwidth; Casting; Computer architecture; Delay; Frequency; Hardware; Logic design; Random access memory; Sampling methods;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.921181