DocumentCode
1744895
Title
Performance comparison of DWT scheduling alternatives on programmable platforms
Author
Zervas, N.D. ; Tagopoulos, I. ; Spiliotopoulos, V. ; Anagnostopoulos, G.P. ; Soudris, D. ; Goutis, C.E.
Author_Institution
Dept. of Electr. & Comput. Eng., Patras Univ., Greece
Volume
2
fYear
2001
fDate
6-9 May 2001
Firstpage
761
Abstract
The Discrete Wavelet Transformations (DWT) are data intensive algorithms. Energy dissipation and execution time of such algorithms heavily depends on data memory hierarchy performance when programmable platforms are considered. Existing filtering operations scheduling alternatives for the 1D-DWT, employ different levels of data access locality. However locality of data references, usually comes at the expense of complex control and addressing. In this paper, the two main scheduling alternatives for the 1D-DWT are compared in terms of energy and speed. Additionally, we describe and evaluate the effect of an in-place mapping scheme, which minimizes memory requirements and improves locality of data reference, for the 1D-DWT. As execution platform, two commercially available general purpose processors are used
Keywords
VLSI; digital filters; discrete wavelet transforms; processor scheduling; DWT scheduling alternatives; Discrete Wavelet Transformations; data memory hierarchy performance; data reference; energy; execution time; filtering operations; general purpose processors; in-place mapping scheme; memory requirements; programmable platforms; speed; Digital signal processing; Discrete wavelet transforms; Energy dissipation; Filter bank; Filtering; Finite impulse response filter; Processor scheduling; Scheduling algorithm; Very large scale integration; Wavelet analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921182
Filename
921182
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