High dynamic range, arbitrated address event representation digital imager

Author

Culurciello, Eugerzio ; Etienne-Cummings, Ralph ; Boahen, Kwabena

Author_Institution

Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA

Volume

3

fYear

2001

fDate

6-9 May 2001

Firstpage

505

Abstract

An 80×60 pixels arbitrated address-event imager has been designed and fabricated in a 0.6 μm CMOS process. The value of the intensity is inversely proportional to the inter-spike interval and the read-out of each spike is initiated by the pixel. The available output bandwidth is allocated according to the pixel´s demand, favoring brighter pixels and minimizing power consumption. The imager has a large dynamic range: 200 dB for an individual pixel. The array has a dynamic range of 120 dB. The power consumption is 3.4 mW in uniform indoor light and a mean event rate of 200 kHz (41.7 effective fps). The imager is capable of 8.3 K effective fps

Keywords

CMOS image sensors; low-power electronics; 0.6 micron; 200 kHz; 3.4 mW; 4800 pixel; 60 pixel; 80 pixel; CMOS process; arbitrated address event representation; digital imager; high dynamic range; pixel operation; power consumption reduction; Bandwidth; Biological system modeling; Biological systems; CMOS process; Circuits; Digital images; Dynamic range; Energy consumption; Neurons; Pixel;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.921358

Filename

921358