DocumentCode
1745154
Title
A low voltage 8-bit, 40 MS/s switched-current pipeline analog-to-digital converter
Author
Hughes, John B. ; Mec, M. ; Donaldson, W.
Author_Institution
Philips Res. Lab., Redhill, UK
Volume
1
fYear
2001
fDate
6-9 May 2001
Firstpage
572
Abstract
An 8-bit, 40 MS/s, switched current pipeline analog-to-digital converter is presented. It employs a multiplexed architecture with tapered bit stage design and enhanced two-step circuit techniques. Implemented in a 3.3 V, 0.35 μm CMOS process but operating internally from a 1.9 V supply, it achieves 6.4 effective number of bits and a resolution bandwidth of 5 MHz with a dissipation of 60 mW
Keywords
CMOS integrated circuits; analogue-digital conversion; pipeline processing; switched current circuits; 0.35 micron; 1.9 V; 3.3 V; 5 MHz; 60 mW; 8 bit; CMOS process; SI pipeline ADC; analog-to-digital converter; low voltage operation; multiplexed architecture; switched-current ADC; tapered bit stage design; two-step circuit techniques; Analog-digital conversion; Bandwidth; CMOS process; Circuits; Laboratories; Logic; Low voltage; Pipelines; Signal design; Switching converters;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921920
Filename
921920
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