Title :
Exploiting don´t cares to minimize *BMDs
Author :
Scholl, Christoph ; Herbstritt, Marc ; Becker, Bernd
Author_Institution :
Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany
Abstract :
We present for the first time methods to minimize *BMDs exploiting don´t care conditions. These minimization methods can be used during the verification of circuits by *BMDs. By changing function values for input vectors, which are in the don´t care set, smaller *BMDs can be computed to keep peak memory consumption during *BMD construction as low as possible. Preliminary experimental results prove the methods to be very effective in minimizing *BMD sizes
Keywords :
Boolean functions; binary decision diagrams; circuit analysis computing; formal verification; minimisation; *BMD construction; *BMD size minimisation; circuit verification; don´t care conditions; function values; input vectors; minimization methods; Adders; Arithmetic; Binary decision diagrams; Boolean functions; Combinational circuits; Computer science; Data structures; Logic; Minimization methods;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.922017
