Title :
At-speed testing of data communications transceivers
Author :
Liu, S.L. ; Mourad, S. ; Krishnan, S.
Author_Institution :
Intelligent Micro Inc., San Jose, CA, USA
Abstract :
This paper discusses a new BIST methodology suitable for functional testing of transceivers on a data communications chip. Practical circuits are presented which allow the at-speed testing of various functional blocks. The concept has been applied to test a 400 Mbps 3-port IEEE 1394a system. The simulations results are given for the 0.35 μm CMOS
Keywords :
CMOS integrated circuits; built-in self test; data communication equipment; integrated circuit testing; telecommunication equipment testing; transceivers; 0.35 micron; 3-port IEEE 1394a system; 400 Mbit/s; BIST methodology; CMOS; at-speed testing; data communications transceivers; functional testing; Added delay; Built-in self-test; Circuit testing; Clocks; Data communication; Decoding; Delay systems; Jitter; Logic testing; Transceivers;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.922155
