DocumentCode
1745287
Title
Static power consumption management in CMOS memories
Author
Turier, A. ; Ammar, L. Ben ; Amara, A.
Author_Institution
ATMEL, Rousset, France
Volume
4
fYear
2001
fDate
6-9 May 2001
Firstpage
506
Abstract
This paper focus on the selective precharge concept which is used in memory design in order to reduce dynamic power consumption. We show how this technique can reduce drastically static power consumption. Experimental results obtained from a test circuit are given and compared to one using substrate back bias. Substantial gains are reported in this paper for ROM, single and double-port SRAMs memories
Keywords
CMOS memory circuits; SRAM chips; low-power electronics; read-only storage; CMOS memory circuit; ROM; double-port SRAM; low-power design; selective precharge; single-port SRAM; static power consumption management; substrate back bias; CMOS logic circuits; Circuit testing; Energy consumption; Energy management; Frequency; Memory management; Power supplies; Random access memory; Read only memory; Subthreshold current;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.922285
Filename
922285
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