DocumentCode
1745293
Title
A low power asynchronous DES
Author
Siu, Pui-Lam ; Choy, Chiu-Sing ; Butas, J. ; Chan, C.F.
Author_Institution
Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, China
Volume
4
fYear
2001
fDate
6-9 May 2001
Firstpage
538
Abstract
Nowadays, there are many Cryptographic Applications that demand both high speed and low power. In order to meet this requirement, we have designed a new asynchronous Data Encryption Standard (DES) data encryption chip and decided that can be used in contactless smart cards. There are many advantages to use Asynchronous Circuit Design in smart card chips, such as low power consumption and no global clock. We will use a 0.6 μm CMOS technology to fabricate the chip and the RF test circuit
Keywords
CMOS logic circuits; asynchronous circuits; cryptography; low-power electronics; smart cards; 0.6 micron; CMOS chip; Data Encryption Standard; RF circuit; asynchronous circuit; contactless smart card; cryptography; low-power design; Asynchronous circuits; Circuit testing; Clocks; Cryptography; Demodulation; Power supplies; Protection; Radio frequency; Smart cards; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.922293
Filename
922293
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