Title :
A high-performance low-power static differential double edge-triggered flip-flop
Author :
Moisiadis, Yiarznnis ; Bouras, Ilias ; Arapoyanni, Angela ; Dermentzoglou, L.
Author_Institution :
Dept. of Inf., Athens Univ., Greece
Abstract :
A new static differential double edge-triggered flip-flop is proposed. In order to ensure the double edge triggering operation, a narrow pulse is generated after each clocking edge, by means of clock racing. Compared to existing double edge-triggered flip-flops, the presented circuit configuration presents improved delay characteristics, reduced power consumption, while keeps the total transistor count low. Further power and transistor savings can be achieved by applying the narrow pulse to more than one similar adjacent DET flip-flops
Keywords :
flip-flops; low-power electronics; clock racing; delay characteristics; double edge triggering; low-power static differential flip-flop; power consumption; Clocks; Energy consumption; Flip-flops; Informatics; Integrated circuit interconnections; Inverters; Latches; MOSFETs; Pulse generation; Threshold voltage;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.922359
