Title :
Efficient transparency extraction and utilization in hierarchical test
Author :
Makris, Yiorgos ; Patel, Vishal ; Orailoglu, Alex
Author_Institution :
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
Abstract :
We introduce a methodology for identifying transparency behavior appropriate for hierarchical test, based on the theoretical principles of transparency composition. Unlike high level approaches that identify limited, coarse transparency behavior, the proposed methodology is capable of extracting a wide class of fine grained transparency functions for arbitrary sub-word bit clusters. The functions in this class can furthermore be rapidly extracted on the fly and efficiently utilized for hierarchical test translation, thus alleviating the exponential extraction time and storage space requirements of exhaustive approaches. The twin benefits of rapid, automated extraction coupled with the expansion of utilizable transparency scope deliver reduced DFT while enabling cost-effective hierarchical test of high quality
Keywords :
VLSI; automatic testing; integrated circuit testing; logic testing; automated extraction; fine grained transparency functions; hierarchical test; sub-word bit clusters; test translation; transparency behavior identification; transparency composition; transparency extraction; Arithmetic; Automatic testing; Bridges; Circuit testing; Computer science; Coupling circuits; Degradation; Design for testability; Hardware design languages; Signal processing;
Conference_Titel :
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location :
Marina Del Rey, CA
Print_ISBN :
0-7695-1122-8
DOI :
10.1109/VTS.2001.923446