Title :
On the use of fault dominance in n-detection test generation
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
The size of an n-detection test set increases approximately linearly with n. This increase in size may be too fast when an upper bound on test set size must be satisfied. We propose a method for obtaining a more gradual increase in the sizes of n detection test sets, while still ensuring that every additional test would be useful in improving the test set quality. The method is based on the use of fault dominance relations to identify a small subset of faults whose numbers of detections are likely to have a high impact on the defect coverage of the test set
Keywords :
automatic testing; fault diagnosis; integrated circuit testing; logic testing; defect coverage; fault dominance; fault subset; logic testing; n-detection test generation; test set quality; upper bound; Circuit faults; Circuit testing; Cities and towns; Electrical fault detection; Fault detection; Fault diagnosis; Linear approximation; Sequential analysis; Upper bound;
Conference_Titel :
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location :
Marina Del Rey, CA
Print_ISBN :
0-7695-1122-8
DOI :
10.1109/VTS.2001.923462