DocumentCode
1745682
Title
Improving effective bandwidth through compiler enhancement of global cache reuse
Author
Ding, Chen ; Kennedy, Ken
Author_Institution
Dept. of Comput. Sci., Rochester Univ., NY, USA
fYear
2001
fDate
36982
Abstract
Reusing data in cache is critical to achieving high performance on modern machines because it reduces the impact of the latency and bandwidth limitations of direct memory access. To date, most studies of software memory hierarchy management have focused on the latency problem. However today´s machines are increasingly limited by insufficient memory bandwidth-on these machines, latency-oriented techniques are inadequate because they do not seek to minimize the total memory traffic over the whole program. This paper explores the potential for addressing bandwidth limitations by increasing global cache reuse-that is, reusing data across whole program and over the entire data collection. To this end, the paper explores a two-step global strategy. The first step fuses computations on the same data to enable the caching of repeated accesses. The second step groups data used by the same computation to bring about contiguous access to memory. While the first step reduces the frequency of memory accesses, the second step improves their efficiency. The paper demonstrates the effectiveness of this strategy and shows how to automate it in a production compiler
Keywords
cache storage; program compilers; compiler enhancement; direct memory access; global cache reuse; global strategy; production compiler; software memory hierarchy management; Bandwidth; Computer science; Delay; Frequency; Fuses; Memory management; Performance gain; Prefetching;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium., Proceedings 15th International
Conference_Location
San Francisco, CA
ISSN
1530-2075
Print_ISBN
0-7695-0990-8
Type
conf
DOI
10.1109/IPDPS.2001.924975
Filename
924975
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