• DocumentCode
    1746352
  • Title

    The design of an evolvable coprocessor environment

  • Author

    Abielmona, Rami ; Groza, Voicu

  • Author_Institution
    Sch. of Inf. Technol. Eng., Ottawa Univ., Ont., Canada
  • Volume
    2
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    844
  • Abstract
    In this paper we propose a design based on a genetic algorithm to evolve the logic circuit of a defined input function, in which we aim to minimize the total number of gates used. Our design is outlined and briefly discussed while our preliminary results are presented and analyzed
  • Keywords
    circuit CAD; coprocessors; development systems; field programmable gate arrays; genetic algorithms; logic CAD; minimisation of switching nets; FPGA; evolvable coprocessor environment; hardware-implemented genetic algorithm; high-level architecture; logic circuit; Central Processing Unit; Coprocessors; Design engineering; Field programmable gate arrays; Genetic algorithms; Hardware; Information technology; Minimization; Programming profession; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Instrumentation and Measurement Technology Conference, 2001. IMTC 2001. Proceedings of the 18th IEEE
  • Conference_Location
    Budapest
  • ISSN
    1091-5281
  • Print_ISBN
    0-7803-6646-8
  • Type

    conf

  • DOI
    10.1109/IMTC.2001.928196
  • Filename
    928196
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1746352