Measurement problems in high-speed networks

Computer hardware and communications network speeds are rising at a steady rate. From Moore´s law we know that the silicon computing power is doubled every 18 months, and especially with the onset of the Internet, the demand for increasing network bandwidth is also on the constant rise. CPU speeds have recently broken through the 1 GHz barrier, and 10 Gbit/sec network connections are becoming common. With the faster clock signal and shrinking silicon dimensions, digital transitions become faster, and presently sub-100 psec transition times are measured. To save power, but also as a need from the smaller silicon feature sizes, digital voltage swings are becoming smaller. The gigabit signaling techniques combined with dense printed-circuit-board wiring create on-board transmission lines where losses and dispersion must be taken into account. Finally, the low operating voltages and highly supply currents create a need for power-distribution impedances in the milliohm range. As a result, measuring and simulating the signals with several GHz bandwidth verifying trace and cable losses and transfer characteristics, measuring power-distribution network impedances creates new challenges. The paper gives an overview of the state-of-the-art measurement solutions for the above fields