Title :
A 99-mm2, 0.7-W, single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder system
Author :
Kumaki, Satoshi ; Takata, Hidehiro ; Ajioka, Yoshihide ; Ooishi, Tsukasa ; Ishihara, Kazuya ; Hanami, Atsuo ; Tsuji, Takaharu ; Kanehira, Yusuke ; Watanabe, Tetsuya ; Morishima, Chikayoshi ; Yoshizawa, Tomoaki ; Sato, Hidenori ; Hattori, Shin-ichi ; Koshi
Author_Institution :
Syst. LSI Dev. Center, Mitsubishi Electr. Corp., Kyoto, Japan
Abstract :
A scalable single-chip 422P@ML MPEG-2 video, audio, and system encoder LSI for portable 422P@HL system is described. The encoder LSI is implemented using 0.13 μm embedded DRAM technology. It integrates 3-M logic gates and 64-Mbit DRAM in an area of 99-mm2. The power consumption is suppressed to 0.7-Watts by adopting a low power DRAM core. It performs real-time 422P@ML video encoding, audio encoding, and system encoding with no external DRAM. Furthermore, the encoder LSI realizes a 422P@HL video encoder with multi-chip configuration, due to its scalable architecture. This results in a PC-card size 422P@HL encoder with lowest power consumption for portable HDTV codec system
Keywords :
DRAM chips; audio coding; high definition television; large scale integration; video coding; 0.13 micron; 0.7 W; 64 Mbit; HDTV; MPEG-2 422P@ML; audio encoding; embedded DRAM; low power DRAM core; multi-chip configuration; portable 422P@HL encoder system; power consumption; scalable architecture; system encoding; video encoding; Costs; Digital filters; Encoding; Energy consumption; HDTV; Large scale integration; Nonlinear filters; Random access memory; Real time systems; Ultra large scale integration;
Conference_Titel :
Custom Integrated Circuits, 2001, IEEE Conference on.
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-6591-7
DOI :
10.1109/CICC.2001.929815
