Clock generator using factorial DLL for video applications

Author

Begueret, Jean-Baptiste ; Deval, Yann ; Mazouffre, Olivier ; Spataro, Anne ; Fouillat, Pascal ; Benoit, Eric ; Mendoza, Jean

Author_Institution

Bordeaux I Univ., Talence, France

fYear

2001

fDate

2001

Firstpage

485

Lastpage

488

Abstract

This paper presents a clock generator dedicated to front-end processors for LCD and plasma monitor video applications. The topology is based on a factorial DLL, which can support all kind of standards (from VGA up to SXGA). Fabricated in a 2.5 V, 0.25 μm, 6-metal CMOS VLSI process from STMicroelectronics, the maximum r.m.s. measured jitter is 17 ps. The power consumption is 17 mW at 200 MHz output frequency. The low cost area (0.08 mm²) and the fully integrated structure make it well suited for such a video market

Keywords

CMOS digital integrated circuits; circuit stability; clocks; delay lock loops; high-speed integrated circuits; liquid crystal displays; plasma displays; pulse generators; synchronisation; timing circuits; video signals; 0.25 micron; 17 mW; 200 MHz; DLL stability; LCD applications; STMicroelectronics; clock generator; factorial DLL; front-end processors; multi-standard support; plasma monitors; six-metal CMOS VLSI process; video applications; CMOS process; Clocks; Energy consumption; Frequency; Jitter; Monitoring; Plasma applications; Plasma measurements; Topology; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 2001, IEEE Conference on.

Conference_Location

San Diego, CA

Print_ISBN

0-7803-6591-7

Type

conf

DOI

10.1109/CICC.2001.929826

Filename

929826